Substrates or surfaces in 3D integrated circuit production or in electronic assembly in general may have arrays of electrical contacts, bonding pads, or grid arrays to be conductively joined to corresponding electrical contacts on a second substrate or surface. Uniformity in the contacts may not always be perfect. Conventionally, if a single electrical contact is too short or too tall, there is often no leeway in the joining of the two surfaces to allow the short contact to meet its target bonding pad, or to prevent a tall contact from preventing the bonding of nearby contacts. This is because conventional contacts are all assumed to be ideal, and dielectric layers present between surfaces to be joined are calculated to provide an unvarying stop in the joining of the two surfaces at a definite, single, fixed distance. This lack of compliance in conventional die or wafer level joining processes results in a certain percentage of the final product being unacceptable, as there may be some electrical contacts that did not connect during the joining.